On Tue, May 03, 2011 at 04:07:42PM +0200, Takashi Iwai wrote:
Mark Brown wrote:
If we can't get the data laid out in a contiguous array in memory then we have to gather the data for transmit in the I/O code which is painful and wasteful.
But it's just a matter of CPU usage to look for the caches. Well, what I don't understand is the text you wrote:
No, as I said in my initial reply the big win is I/O bandwidth from block writes. There will also be a memory and consequent dcache win from reducing the size of the data structure but that is likely to be dwarfed by any write coalescing.
| This isn't about CPU usage, it's about I/O bandwidth which is a big | concern in situations like resume where you can be bringing the device | back up from cold.
How does the contiguous memory layout inside the cache management reduce the I/O bandwidth...?
If the data is laid out contiguously then we can easily send it to the chip in one block.