On Thu, Jul 25, 2019 at 09:02:22AM +0300, Daniel Baluta wrote:
On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen nicoleotsuka@gmail.com wrote:
On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
This allows combining multiple-data-line FIFOs into a single-data-line FIFO.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
This should be sent to devicetree mail-list also.
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt index 59f4d965a5fb..ca27afd840ba 100644 --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt @@ -54,6 +54,10 @@ Optional properties: represents first data line, bit 1 represents second data line and so on. Data line is enabled if corresponding bit is set to 1.
- fsl,fcomb_mode : list of two integers (first for RX, second for TX)
representing FIFO combine mode. Possible values forcombined mode are: 0 - disabled, 1 - Rx/Tx from shiftregisters, 2 - Rx/Tx by software, 3 - both.Looks like a software configuration to me, instead of a device property. Is this configurable by user case, or hard-coded by SoC/hardware design?
Indeed this is a software configuration and configurable by user case. Will think of a another way to specify it.
Yea, it needs to be put somewhere else other than devicetree.
Not sure sysfs is a good approach for ASoC components or can be done via amixer control.