At Wed, 19 Aug 2009 12:48:26 +0000, Shine Liu wrote:
On Wed, 2009-08-19 at 14:05 +0200, Takashi Iwai wrote:
But the irq last issued should be at 0x3e80, but not 0x3800 + 0x800 = 0x4000. The DMA engine loaded 0x680 frame not 0x800 frame at the last time.
Then it's a driver bug. If unaligned period size is allowed, it means that the irq is really generated in that period, not at the buffer boundary. Otherwise, it must have a proper hw-constraint to align the period size to the buffer size.
What hardware is it?
Yes, but there's no constraint code currently to force to align the period size to the buffer size. The bug occurs on linux-2.6.31-rc6 on ASoC s3c24xx platform.
The constraint to force to align the period size to the buffer size should not be hardware depended, it shoud be done in the generic layer, is it?
It is hardware dependent, i.e. how the irq is generated. If the irq is generated in a way like timer, the period size doesn't have to be aligned with the buffer size. But your case doesn't look like that.
Takashi