On Tue, Sep 29, 2015 at 11:41 AM, Rick Mann rmann@latencyzero.com wrote:
Ugh, sorry. Here you go:
https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PR...
Sent from my iPhone
On Sep 29, 2015, at 07:08, Caleb Crome caleb@crome.org wrote:
Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to 12 MHz); that might be okay.
It's definitely not obvious why you'd be getting 24MHz instead of 12. Wait. Are you getting exactly 24 MHz, or about 24 MHz? in davinci-evm.c there are some .sysclk settings set to 24576000 as in the da830_snd_soc_card_crvdata.
# speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0
WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, low for right for each channel's word. BCLK is 379.5 kHz.
Sounds like you're not in I2S mode, you must be in DSP or left-justified mode. That's set in your eavinci-evm.c in the snd_soc_dai_link structure under the field .dai_fmt. Most of them are set to SND_SOC_DAIFMT_DSP_B.
-Caleb