2 Aug
2011
2 Aug
'11
6:29 p.m.
On Tue, Aug 02, 2011 at 11:51:41AM +0200, Wolfram Sang wrote:
So, do I get it right, that my initial patch (attached below again) might be interesting after all, because it makes the register layout truly flat (also makes the driver usable for me). Then, based on that, a new cache type which takes step size into account could be added to the soc-core and the codec driver can be later switched to the new cache type?
Yes, this is entirely sensible. Even if there are issues with this approach they're kept local to the CODEC driver. Please send normally for review.