Allows ADSP control code to set the dsp clock rate to match the sys clock rate.
Signed-off-by: Chris Rattray crattray@opensource.wolfsonmicro.com --- sound/soc/codecs/wm2200.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/wm2200.c b/sound/soc/codecs/wm2200.c index 5259ebd..0181444 100644 --- a/sound/soc/codecs/wm2200.c +++ b/sound/soc/codecs/wm2200.c @@ -2205,6 +2205,9 @@ static int wm2200_i2c_probe(struct i2c_client *i2c, wm2200->dsp[i].num = i + 1; wm2200->dsp[i].dev = &i2c->dev; wm2200->dsp[i].regmap = wm2200->regmap; + wm2200->dsp[i].sysclk_reg = WM2200_CLOCKING_3; + wm2200->dsp[i].sysclk_mask = WM2200_SYSCLK_FREQ_MASK; + wm2200->dsp[i].sysclk_shift = WM2200_SYSCLK_FREQ_SHIFT; }
wm2200->dsp[0].base = WM2200_DSP1_CONTROL_1;