On Sat, Apr 02, 2011 at 04:12:44PM +0800, Lu Guanqun wrote:
On Sat, Apr 02, 2011 at 04:07:55PM +0800, Lu Guanqun wrote:
But I still don't quite understand the write compression, it aims at reducing the number of register writes, however in dapm_seq_run_coalesced, it calls snd_soc_update_bits.
I mean, for write compression or not, as long as its widget register is valid, it will be updated. So I don't see why write compression would reduce the number...
The idea is that since you often have all the enable bits together in a small set of registers if you're enabling two of the same widget type at once and they're both in the same register you can do it with one write. For example, if you're doing a stereo playback this will usually mean that enabling left and right DACs is one register write. This is also good for pop/click performance as it ensures that both channels turn on simultaneously.
You can see this quite easily if you turn on DAPM pop debugging with a short delay - write to asoc/$CARD/dapm_pop_time in debugfs and start a playback or something and you'll see logging showing the writes being combined.