10 May
2016
10 May
'16
6:34 p.m.
On Tue, May 3, 2016 at 5:24 AM, Fabio Estevam festevam@gmail.com wrote:
On Tue, May 3, 2016 at 9:13 AM, Arnaud Mouiche arnaud.mouiche@invoxia.com wrote:
Previously, SCR.SSIEN and SCR.TE were enabled at once if no capture stream was also running. This may not give a chance for the DMA to write the first sample in TX FIFO before the streaming starts on the PCM bus, inserting void samples first. Those void samples are then responsible for slipping the channels.
Signed-off-by: Arnaud Mouiche arnaud.mouiche@invoxia.com
Reviewed-by: Fabio Estevam fabio.estevam@nxp.com
Tested-by: Caleb Crome caleb@crome.org