On 03/25/2013 09:52 AM, Mark Brown wrote:
On Thu, Mar 21, 2013 at 01:56:41PM -0600, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Tegra114's AHUB shares a design with Tegra30, with the followin changes: * Supports more (10 vs. 4) bi-directional FIFO channels into RAM.
Applied but...
Thanks.
- clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>, +
<&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>, + <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>, + <&tegra_car 110>, <&tegra_car 162>; + clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2", + "i2s3", "i2s4", "dam0", "dam1", "dam2", + "spdif_in";
...this is exactly what I was worried about with the clock bindings :/
What's the exact issue here? The length of the list is rather determined by the HW, so I don't think there's much one can do about that.