20 May
2010
20 May
'10
11:44 p.m.
On Thu, May 20, 2010 at 05:53:07PM -0500, Jorge Eduardo Candelaria wrote:
When using MCLK is configured for 19.2 Mhz, clock slicer should be enabled and HPPLL should be bypassed in clock path.
Signed-off-by: Jorge Eduardo Candelaria jorge.candelaria@ti.com Signed-off-by: Margarita Olaya Cabrera magi.olaya@ti.com
Acked-by: Mark Brown broonie@opensource.wolfsonmicro.com