The patch
ASoC: meson: tdmin: expose all 16 inputs
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From cde9f12e5f0d288d516c810f95c2ee4c171e0245 Mon Sep 17 00:00:00 2001
From: Jerome Brunet jbrunet@baylibre.com Date: Thu, 5 Sep 2019 14:01:17 +0200 Subject: [PATCH] ASoC: meson: tdmin: expose all 16 inputs
The TDMIN component, as it, has a maximum of 16 input. Depending on the SoC, these may not all be connected.
Instead of decribing only the connected inputs of each SoC, describe them all and let ASoC routing do the rest.
Signed-off-by: Jerome Brunet jbrunet@baylibre.com Link: https://lore.kernel.org/r/20190905120120.31752-6-jbrunet@baylibre.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/meson/axg-tdmin.c | 47 +++++++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 13 deletions(-)
diff --git a/sound/soc/meson/axg-tdmin.c b/sound/soc/meson/axg-tdmin.c index cb87f17f3e95..973d4c02ef8d 100644 --- a/sound/soc/meson/axg-tdmin.c +++ b/sound/soc/meson/axg-tdmin.c @@ -43,7 +43,8 @@ static const struct regmap_config axg_tdmin_regmap_cfg = { };
static const char * const axg_tdmin_sel_texts[] = { - "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", + "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7", + "IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15", };
/* Change to special mux control to reset dapm */ @@ -164,12 +165,22 @@ static int axg_tdmin_prepare(struct regmap *map, }
static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = { - SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 8", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 9", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0), SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmin_in_mux), SND_SOC_DAPM_PGA_E("DEC", SND_SOC_NOPM, 0, 0, NULL, 0, axg_tdm_formatter_event, @@ -178,12 +189,22 @@ static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = { };
static const struct snd_soc_dapm_route axg_tdmin_dapm_routes[] = { - { "SRC SEL", "IN 0", "IN 0" }, - { "SRC SEL", "IN 1", "IN 1" }, - { "SRC SEL", "IN 2", "IN 2" }, - { "SRC SEL", "IN 3", "IN 3" }, - { "SRC SEL", "IN 4", "IN 4" }, - { "SRC SEL", "IN 5", "IN 5" }, + { "SRC SEL", "IN 0", "IN 0" }, + { "SRC SEL", "IN 1", "IN 1" }, + { "SRC SEL", "IN 2", "IN 2" }, + { "SRC SEL", "IN 3", "IN 3" }, + { "SRC SEL", "IN 4", "IN 4" }, + { "SRC SEL", "IN 5", "IN 5" }, + { "SRC SEL", "IN 6", "IN 6" }, + { "SRC SEL", "IN 7", "IN 7" }, + { "SRC SEL", "IN 8", "IN 8" }, + { "SRC SEL", "IN 9", "IN 9" }, + { "SRC SEL", "IN 10", "IN 10" }, + { "SRC SEL", "IN 11", "IN 11" }, + { "SRC SEL", "IN 12", "IN 12" }, + { "SRC SEL", "IN 13", "IN 13" }, + { "SRC SEL", "IN 14", "IN 14" }, + { "SRC SEL", "IN 15", "IN 15" }, { "DEC", NULL, "SRC SEL" }, { "OUT", NULL, "DEC" }, };