On Thu, Jan 06, 2022 at 11:25:28PM +0000, Robert Hancock wrote:
On Thu, 2022-01-06 at 12:42 +0000, Mark Brown wrote:
On Wed, Jan 05, 2022 at 04:51:44PM -0600, Robert Hancock wrote:
snd_soc_params_to_bclk().
I don't think that works here since that depends on the result of snd_soc_params_to_frame_size, which doesn't account for the bits per sample being forced to 32 when the 32bit_lrclk mode is active?
OK.
if (!sclk_div || (sclk_div & ~I2S_I2STIM_VALID_MASK)) {
dev_warn(i2s_dai->dev, "invalid SCLK divisor for sysclk
%u and sclk %u\n",
drv_data->last_sysclk, sclk);
return -EINVAL;
}
This indicates that we should be setting some constraints on sample rate based on sysclk.
Is there a way to do this at this level given that it can only be enforced after set_sysclk is called? Most of the other drivers that enforce rate constraints seem to be more of a fixed list..
if (drvdata->sysclk) { /* set constraints */ }
like a bunch of other drivers do (eg, wm8731).
writel(sclk_div, drv_data->base + I2S_I2STIM_OFFSET);
- }
Does the device actually support operation without knowing the sysclk?
It could work if set_clkdiv is called to directly set the divider, rather than set_sysclk. simple-card doesn't do that, but possibly some other setup which uses this does?
We should be migrating away from set_clkdiv() anyway, it'll be fine to require that such drivers be updated.