Well, it turns out that the TAS5709 documentation doesn't say the whole story. It seems that after all the chip can only guess the incoming bit rates in rare occasions and I can't really rely on this. What the chip really needs is a MCLK signal which is a multiple of the sound file's sample frequency. This is a third clock line to be provided to that chip in addition to the regular TF (frame) and TK (bit) clocks from the SSC interface.
Now I know that I have to output this additional clock line via one of the gpio pins of the SoC and therefore I have to somehow "attach" one of the CPU internal timers to one of the SoC gpio pins (PC6, linux gpio102 pin to be more exact). I have the following (borrowed) code now:
/* PCK0 provides MCLK */ at91_set_A_periph(AT91_PIN_PC6, 0);
How is this linking the internal pck0 timer to pin PC6? or is it?
And then I have
/* * Codec MCLK is supplied by PCK0 - set it up. */ mclk = clk_get(NULL, "pck0"); if (IS_ERR(mclk)) { pr_err("%s: Failed to get MCLK\n", __func__); ret = PTR_ERR(mclk); goto err; }
pllb = clk_get(NULL, "pllb"); if (IS_ERR(pllb)) { pr_err("%s: Failed to get PLLB\n", __func__); ret = PTR_ERR(pllb); goto err_pllb; }
ret = clk_set_parent(mclk, pllb); if (ret != 0) { pr_err("%s: Failed to set MCLK parent\n", __func__); goto err_parent; }
clk_set_rate(mclk, 11289600); clk_put(pllb); pr_info("%s: MCLK rate %luHz\n", __func__, clk_get_rate(mclk));
... but it prints "MCLK rate 6000000Hz". Where does the 600000 come from, I don't know. And certainly there is no clock on the PC6 pin :-(
Mark, or someone, any enlightenment on how to proceed would be very much appreciated.
Thank you,