At Wed, 22 Aug 2012 18:46:43 +0800, mengdong.lin@intel.com wrote:
From: Mengdong Lin mengdong.lin@intel.com
If a codec can support targeted pass-through operations in D3 state when there is no BCLK present on the link, it will set CLKSTOP flag in the supported power states and report PS-ClkStopOk when entering D3 state.
So only if a codec supports this stop-clock feature, it will request suspending the controller after it enters D3 and requst resuming the controller before back to D0. Thus the controller will be suspended only when all codecs are suspended and support stop-clock in D3.
Please refer to HDA spec section 7.3.3.10 Power state and 7.3.4.12 Supported Power States.
Details:
- azx_power_notify() add 'codec' as 2nd parameter to check its stop-clock flag.
- each codec count 1 on the controller's power usage counter, and inc/dec the count independently from each other.
You shouldn't move pm_runtime_get_noresume() / _put_no_idle() to hda_codec.c, but these should be called only in hda_intel.c. Basically there is no PCI-specific code in hda_codec.c and patch_*.c. All PCI controller code should be in hda_intel.c.
(snip)
else if (chip->running && power_save_controller &&
!bus->power_keep_link_on) {
azx_stop_chip(chip);!bus->power_keep_link_on)
/* TODO: Suspend controller only if all codec support
stop-clock in D3, for wakeup consideration */
- if (!bus->power_keep_link_on
pm_runtime_put_sync(&chip->pci->dev);&& !codec->power_on && codec->d3_stop_clk_ok)
Also it should check power_save_controller, too.
Takashi