24 Dec
2012
24 Dec
'12
4:53 p.m.
On Mon, Dec 10, 2012 at 10:30:04AM +0100, Daniel Mack wrote:
The CS4271 requires its LRCLK and MCLK to be stable before its RESET line is de-asserted. That also means that clocks cannot be changed without putting the chip back into hardware reset, which also requires a complete re-initialization of all registers.
Applied, thanks.