8 May
2013
8 May
'13
4:59 p.m.
On Wed, May 08, 2013 at 07:26:22AM -0700, Eric Nelson wrote:
An initial pass of writing all of the default register values with a sort of 'cache flush' appears to be the right thing.
Then it doesn't even matter if the values match the datasheet, or if the spec changes over time. If the values are reasonable, the device will function properly.
No, it does matter - when we do things like cache syncs on resume the core will suppress writes of registers which have their power on value since either the register will have been reset to that value by power loss or retained the value due to power being maintained. This is a useful win when resuming to audio activity, I2C is pretty slow.