Re: [PATCH v5 08/31] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC

On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote:

The QMC (QUICC mutichannel controller) is a controller present in some PowerQUICC SoC such as MPC885. The QMC HDLC uses the QMC controller to transfer HDLC data.

Additionally, a framer can be connected to the QMC HDLC. If present, this framer is the interface between the TDM bus used by the QMC HDLC and the E1/T1 line. The QMC HDLC can use this framer to get information about the E1/T1 line and configure the E1/T1 line.

Signed-off-by: Herve Codina herve.codina@bootlin.com

.../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml index 82d9beb48e00..b5073531f3f1 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml @@ -101,6 +101,16 @@ patternProperties: Channel assigned Rx time-slots within the Rx time-slots routed by the TSA to this cell.

•  compatible:
  

•    const: fsl,qmc-hdlc
  

•  fsl,framer:
  

•    $ref: /schemas/types.yaml#/definitions/phandle
  

•    description:
  

•      phandle to the framer node. The framer is in charge of an E1/T1 line
  

•      interface connected to the TDM bus. It can be used to get the E1/T1 line
  

•      status such as link up/down.
  

Sounds like this fsl,framer property should depend on the compatible being present, no?

Thanks, Conor.

• required: - reg - fsl,tx-ts-mask

@@ -159,5 +169,8 @@ examples: fsl,operational-mode = "hdlc"; fsl,tx-ts-mask = <0x00000000 0x0000ff00>; fsl,rx-ts-mask = <0x00000000 0x0000ff00>;

•        compatible = "fsl,qmc-hdlc";
  

•        fsl,framer = <&framer>;
     };
  

  };

-- 2.41.0