Configure clock rate for audio PLL. There's one audio PLL on i.MX93. It is used as parent clock for clocks that are multiple of 8kHz.
Signed-off-by: Chancel Liu chancel.liu@nxp.com --- arch/arm64/boot/dts/freescale/imx93.dtsi | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index a1310710080a..1438074f3bd9 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -419,6 +419,8 @@ clk: clock-controller@44450000 { #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>; clock-names = "osc_32k", "osc_24m", "clk_ext1"; + assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>; + assigned-clock-rates = <393216000>; status = "okay"; };