Hi Shengjiu,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on shawnguo/for-next] [also build test ERROR on robh/for-next broonie-sound/for-next linus/master v5.19-rc7 next-20220718] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shengjiu-Wang/ASoC-SOF-imx-Ad... base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next config: sh-allmodconfig compiler: sh4-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/7cd457928803203c18dc543f6f98c3... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Shengjiu-Wang/ASoC-SOF-imx-Add-i-MX8ULP-HW-support/20220719-134348 git checkout 7cd457928803203c18dc543f6f98c304fa601a30 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sh SHELL=/bin/bash sound/soc/sof/imx/
If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot lkp@intel.com
All errors (new ones prefixed by >>):
sound/soc/sof/imx/imx8ulp.c: In function 'imx8ulp_reset':
sound/soc/sof/imx/imx8ulp.c:186:9: error: implicit declaration of function 'arm_smccc_smc' [-Werror=implicit-function-declaration]
186 | arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_resource); | ^~~~~~~~~~~~~ sound/soc/sof/imx/imx8ulp.c: At top level:
sound/soc/sof/imx/imx8ulp.c:42:33: error: storage size of 'smc_resource' isn't known
42 | struct arm_smccc_res smc_resource; | ^~~~~~~~~~~~ cc1: some warnings being treated as errors
vim +/arm_smccc_smc +186 sound/soc/sof/imx/imx8ulp.c
41
42 struct arm_smccc_res smc_resource;
43 44 static struct clk_bulk_data imx8ulp_dsp_clks[] = { 45 { .id = "core" }, 46 { .id = "ipg" }, 47 { .id = "ocram" }, 48 { .id = "mu" }, 49 }; 50 51 struct imx8ulp_priv { 52 struct device *dev; 53 struct snd_sof_dev *sdev; 54 55 /* DSP IPC handler */ 56 struct imx_dsp_ipc *dsp_ipc; 57 struct platform_device *ipc_dev; 58 59 struct regmap *regmap; 60 struct imx_clocks *clks; 61 }; 62 63 static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv) 64 { 65 /* Controls the HiFi4 DSP Reset: 1 in reset, 0 out of reset */ 66 regmap_update_bits(priv->regmap, SYSCTRL0, RESET_BIT, 0); 67 /* Reset HiFi4 DSP Debug logic: 1 reset, 0 not set */ 68 regmap_update_bits(priv->regmap, SYSCTRL0, DEBUG_LOGIC_BIT, 0); 69 /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */ 70 regmap_update_bits(priv->regmap, SYSCTRL0, EXECUTE_BIT, 0); 71 } 72 73 static void imx8ulp_get_reply(struct snd_sof_dev *sdev) 74 { 75 struct snd_sof_ipc_msg *msg = sdev->msg; 76 struct sof_ipc_reply reply; 77 int ret = 0; 78 79 if (!msg) { 80 dev_warn(sdev->dev, "unexpected ipc interrupt\n"); 81 return; 82 } 83 84 /* get reply */ 85 sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply)); 86 87 if (reply.error < 0) { 88 memcpy(msg->reply_data, &reply, sizeof(reply)); 89 ret = reply.error; 90 } else { 91 /* reply has correct size? */ 92 if (reply.hdr.size != msg->reply_size) { 93 dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n", 94 msg->reply_size, reply.hdr.size); 95 ret = -EINVAL; 96 } 97 98 /* read the message */ 99 if (msg->reply_size > 0) 100 sof_mailbox_read(sdev, sdev->host_box.offset, 101 msg->reply_data, msg->reply_size); 102 } 103 104 msg->reply_error = ret; 105 } 106 107 static int imx8ulp_get_mailbox_offset(struct snd_sof_dev *sdev) 108 { 109 return MBOX_OFFSET; 110 } 111 112 static int imx8ulp_get_window_offset(struct snd_sof_dev *sdev, u32 id) 113 { 114 return MBOX_OFFSET; 115 } 116 117 static void imx8ulp_dsp_handle_reply(struct imx_dsp_ipc *ipc) 118 { 119 struct imx8ulp_priv *priv = imx_dsp_get_data(ipc); 120 unsigned long flags; 121 122 spin_lock_irqsave(&priv->sdev->ipc_lock, flags); 123 124 imx8ulp_get_reply(priv->sdev); 125 snd_sof_ipc_reply(priv->sdev, 0); 126 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); 127 } 128 129 static void imx8ulp_dsp_handle_request(struct imx_dsp_ipc *ipc) 130 { 131 struct imx8ulp_priv *priv = imx_dsp_get_data(ipc); 132 u32 p; /* panic code */ 133 134 /* Read the message from the debug box. */ 135 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p)); 136 137 /* Check to see if the message is a panic code (0x0dead***) */ 138 if ((p & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) 139 snd_sof_dsp_panic(priv->sdev, p, true); 140 else 141 snd_sof_ipc_msgs_rx(priv->sdev); 142 } 143 144 static struct imx_dsp_ops dsp_ops = { 145 .handle_reply = imx8ulp_dsp_handle_reply, 146 .handle_request = imx8ulp_dsp_handle_request, 147 }; 148 149 static int imx8ulp_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) 150 { 151 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; 152 153 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, 154 msg->msg_size); 155 imx_dsp_ring_doorbell(priv->dsp_ipc, 0); 156 157 return 0; 158 } 159 160 static int imx8ulp_run(struct snd_sof_dev *sdev) 161 { 162 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; 163 164 imx8ulp_sim_lpav_start(priv); 165 166 return 0; 167 } 168 169 static int imx8ulp_reset(struct snd_sof_dev *sdev) 170 { 171 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; 172 173 /* HiFi4 Platform Clock Enable: 1 enabled, 0 disabled */ 174 regmap_update_bits(priv->regmap, SYSCTRL0, PLAT_CLK_BIT, PLAT_CLK_BIT); 175 /* HiFi4 PBCLK clock enable: 1 enabled, 0 disabled */ 176 regmap_update_bits(priv->regmap, SYSCTRL0, PB_CLK_BIT, PB_CLK_BIT); 177 /* HiFi4 Clock Enable: 1 enabled, 0 disabled */ 178 regmap_update_bits(priv->regmap, SYSCTRL0, HIFI4_CLK_BIT, HIFI4_CLK_BIT); 179 180 regmap_update_bits(priv->regmap, SYSCTRL0, RESET_BIT, RESET_BIT); 181 usleep_range(1, 2); 182 /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */ 183 regmap_update_bits(priv->regmap, SYSCTRL0, EXECUTE_BIT, EXECUTE_BIT); 184 usleep_range(1, 2); 185
186 arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_resource);
187 188 return 0; 189 } 190