On 10/18/2016 5:49 AM, Ard Biesheuvel wrote:
On 18 October 2016 at 13:46, Mike Travis travis@sgi.com wrote:
Have you tested this change on a system which has physical addressing > 40 bits to insure that addresses > 40 bits are not simply truncated to an incorrect (mod 40) address?
The device should never see addresses > 40 bits, given that the DMA mask is set to 40 bits not 64.
I agree that the device should never see that. But how is that restriction imposed? If a user presents an buffer address > 40 bits how would that be converted to useful buffer at <= 40 bits?
I believe I tried this (at the time the kernel was at version 2.6) and it did not work. Since audio I/O was such a low (relative) bandwidth, it was not worth the effort to rework the audio code to allow buffers > 32 bits but <= 40 bits. It may have changed since then?
By not restricting the addresses to 32 bits you are not restricting the device to the DMA32 zone.
This is what caused the original panic on UV systems.
Btw, the newest nVidia GPUs have > 40 bits of DMA address bits.
Thanks, Ard.