Hi,
On Thu, Jun 16, 2022 at 03:58:35PM +0000, Judy Hsiao wrote:
We discoverd that the state of BCLK on, LRCLK off and SD_MODE on may cause the speaker melting issue. Removing LRCLK while BCLK is present can cause unexpected output behavior including a large DC output voltage as described in the Max98357a datasheet.
In order to:
- prevent BCLK from turning on by other component.
- keep BCLK and LRCLK being present at the same time
This patch adjusts the device tree to allow BCLK to switch to GPIO func before LRCLK output, and switch back during LRCLK is output.
Signed-off-by: Judy Hsiao judyhsiao@chromium.org
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1662,9 +1662,10 @@ i2s0: i2s@ff880000 { dma-names = "tx", "rx"; clock-names = "i2s_clk", "i2s_hclk"; clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_8ch_bus>; power-domains = <&power RK3399_PD_SDIOAUDIO>;pinctrl-names = "bclk_on", "bclk_off";
pinctrl-1 = <&i2s0_8ch_bus_bclk_off>;
It seems like 'pinctrl-1' may make sense after pinctrl-0, not here. Perhaps you're interacting with my RFC PATCH that removes this 'power-domains' property?
https://lore.kernel.org/linux-rockchip/20220613183556.RFC.1.I9ca71105e505f02...
But that most likely isn't landing upstream as-is.
Otherwise, this patch looks good to me:
Reviewed-by: Brian Norris briannorris@chromium.org
#sound-dai-cells = <0>; status = "disabled";
};