On 12/15/23 10:02, Mahapatra, Amit Kumar wrote:
Hello Tudor,
Hi,
-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Friday, December 15, 2023 1:40 PM To: Mahapatra, Amit Kumar amit.kumar-mahapatra@amd.com; broonie@kernel.org; pratyush@kernel.org; miquel.raynal@bootlin.com; richard@nod.at; vigneshr@ti.com; sbinding@opensource.cirrus.com; lee@kernel.org; james.schulman@cirrus.com; david.rhodes@cirrus.com; rf@opensource.cirrus.com; perex@perex.cz; tiwai@suse.com Cc: linux-spi@vger.kernel.org; linux-kernel@vger.kernel.org; michael@walle.cc; linux-mtd@lists.infradead.org; nicolas.ferre@microchip.com; alexandre.belloni@bootlin.com; claudiu.beznea@tuxon.dev; Simek, Michal michal.simek@amd.com; linux- arm-kernel@lists.infradead.org; alsa-devel@alsa-project.org; patches@opensource.cirrus.com; linux-sound@vger.kernel.org; git (AMD- Xilinx) git@amd.com; amitrkcian2002@gmail.com Subject: Re: [PATCH v11 07/10] mtd: spi-nor: Add stacked memories support in spi-nor
On 15.12.2023 09:55, Mahapatra, Amit Kumar wrote:
Thanks! Can you share with us what flashes you used for testing in the stacked and parallel configurations?
I used SPI-NOR QSPI flashes for testing stacked and parallel.
I got that, I wanted the flash name or device ID.
N25Q00A, MX66U2G45G, IS25LP01G & W25H02JV are some of the QSPI flashes on which we tested. Additionally, we conducted tests on over 30 different QSPI flashes from four distinct vendors (Miron, Winbond, Macronix, and ISSI).
Great.
What I'm interested is if each flash is in its own package. Are they?
I'm sorry, but I don't quite understand what you mean by "if each flash in its own package."
There are flashes that are stacked at the physical level. It's a single flash with multiple dies, that are all under a single physical package.
As I understand, your stacked flash model is at logical level. You have 2 flashes each in its own package. 2 different entities. Is my understanding correct?
Cheers, ta