From: Ajit Kumar Pandey AjitKumar.Pandey@amd.com
ACP_SRAM_PTE block has cache that needs to be flushed after every PTE updates. This patch updates ACPAXI2AXI_ATU_CTRL register to flush cache after updating PTE with stream physical address.
Reviewed-by: Ranjani Sridharan ranjani.sridharan@linux.intel.com Signed-off-by: Ajit Kumar Pandey AjitKumar.Pandey@amd.com Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com --- sound/soc/sof/amd/acp-stream.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/sound/soc/sof/amd/acp-stream.c b/sound/soc/sof/amd/acp-stream.c index f2837bfbdb20..b3ca4a90dbf8 100644 --- a/sound/soc/sof/amd/acp-stream.c +++ b/sound/soc/sof/amd/acp-stream.c @@ -115,6 +115,9 @@ int acp_dsp_stream_config(struct snd_sof_dev *sdev, struct acp_dsp_stream *strea offset += 8; }
+ /* Flush ATU Cache after PTE Update */ + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACPAXI2AXI_ATU_CTRL, ACP_ATU_CACHE_INVALID); + return 0; }