Quoting Srinivasa Rao Mandadapu (2022-02-27 22:39:37)
Update description for audio CSR reset control property, which is required for latest chipsets to allow software enabling in CGCR HCLK register.
Signed-off-by: Srinivasa Rao Mandadapu quic_srivasam@quicinc.com Co-developed-by: Venkata Prasad Potturu quic_potturu@quicinc.com Signed-off-by: Venkata Prasad Potturu quic_potturu@quicinc.com
Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 12 ++++++++++++
Any reason this can't be yamlified?
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt index b93a2b3..84c8f54 100644 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt @@ -150,6 +150,18 @@ board specific bus parameters. or applicable for the respective data port. More info in MIPI Alliance SoundWire 1.0 Specifications.
+- reset:
Usage: optional
Value type: <prop-encoded-array>
Definition: Should specify the SoundWire audio CSR reset controller interface,
which is required for SoundWire version 1.6.0 and above.
+- reset-names:
Usage: optional
Value type: <stringlist>
Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset
controller interface.
Note: More Information on detail of encoding of these fields can be found in MIPI Alliance SoundWire 1.0 Specifications. -- 2.7.4