Add ZSC Control register programming sequence for ACP D0 and D3 state transitions for ACP6.3 platform. This will allow ACP to enter low power state when ACP enters D3 state. When ACP enters D0 State, ZSC control should be disabled.
Signed-off-by: Vijendar Mukunda Vijendar.Mukunda@amd.com --- sound/soc/amd/ps/pci-ps.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 4ed50cebadb3..22b677a026e1 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -83,6 +83,7 @@ static int acp63_init(void __iomem *acp_base, struct device *dev) return ret; } acp63_enable_interrupts(acp_base); + writel(0, acp_base + ACP_ZSC_DSP_CTRL); return 0; }
@@ -97,6 +98,7 @@ static int acp63_deinit(void __iomem *acp_base, struct device *dev) return ret; } writel(0, acp_base + ACP_CONTROL); + writel(1, acp_base + ACP_ZSC_DSP_CTRL); return 0; }
@@ -655,8 +657,10 @@ static int __maybe_unused snd_acp63_suspend(struct device *dev) adata = dev_get_drvdata(dev); if (adata->is_sdw_dev) { adata->sdw_en_stat = check_acp_sdw_enable_status(adata); - if (adata->sdw_en_stat) + if (adata->sdw_en_stat) { + writel(1, adata->acp63_base + ACP_ZSC_DSP_CTRL); return 0; + } } ret = acp63_deinit(adata->acp63_base, dev); if (ret) @@ -671,9 +675,10 @@ static int __maybe_unused snd_acp63_runtime_resume(struct device *dev) int ret;
adata = dev_get_drvdata(dev); - if (adata->sdw_en_stat) + if (adata->sdw_en_stat) { + writel(0, adata->acp63_base + ACP_ZSC_DSP_CTRL); return 0; - + } ret = acp63_init(adata->acp63_base, dev); if (ret) { dev_err(dev, "ACP init failed\n"); @@ -691,8 +696,10 @@ static int __maybe_unused snd_acp63_resume(struct device *dev) int ret;
adata = dev_get_drvdata(dev); - if (adata->sdw_en_stat) + if (adata->sdw_en_stat) { + writel(0, adata->acp63_base + ACP_ZSC_DSP_CTRL); return 0; + }
ret = acp63_init(adata->acp63_base, dev); if (ret)