Hi Lucas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tiwai-sound/for-next] [also build test WARNING on tiwai-sound/for-linus linus/master v6.2-rc7 next-20230208] [cannot apply to broonie-sound/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Lucas-Tanure/ASoC-cs35l41-Onl... base: https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git for-next patch link: https://lore.kernel.org/r/20230208141839.1097377-4-lucas.tanure%40collabora.... patch subject: [PATCH v3 3/4] ALSA: cs35l41: Add shared boost feature config: m68k-allyesconfig (https://download.01.org/0day-ci/archive/20230209/202302090037.Ndp45WTg-lkp@i...) compiler: m68k-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/87a5c357d253db3453537a973252d0... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Lucas-Tanure/ASoC-cs35l41-Only-disable-internal-boost/20230208-222109 git checkout 87a5c357d253db3453537a973252d044ce02ad91 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash sound/soc/codecs/
If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot lkp@intel.com
All warnings (new ones prefixed by >>):
sound/soc/codecs/cs35l41-lib.c: In function 'cs35l41_global_enable':
sound/soc/codecs/cs35l41-lib.c:1212:17: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
1212 | struct reg_sequence cs35l41_mdsync_down_seq[] = { | ^~~~~~ sound/soc/codecs/cs35l41-lib.c:1217:46: error: 'cs35l45' undeclared (first use in this function) 1217 | ret = regmap_multi_reg_write(cs35l45->regmap, cs35l41_mdsync_down_seq, | ^~~~~~~ sound/soc/codecs/cs35l41-lib.c:1217:46: note: each undeclared identifier is reported only once for each function it appears in sound/soc/codecs/cs35l41-lib.c:1231:25: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] 1231 | struct reg_sequence cs35l41_mdsync_up_seq[] = { | ^~~~~~
vim +1212 sound/soc/codecs/cs35l41-lib.c
1190 1191 int cs35l41_global_enable(struct regmap *regmap, enum cs35l41_boost_type b_type, int enable, 1192 struct completion *pll_lock) 1193 { 1194 int ret; 1195 unsigned int gpio1_func, pad_control, pwr_ctrl1, pwr_ctrl3; 1196 1197 switch (b_type) { 1198 case CS35L41_SHD_BOOST_ACTV: 1199 case CS35L41_SHD_BOOST_PASS: 1200 regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3); 1201 regmap_read(regmap, CS35L41_GPIO_PAD_CONTROL, &pad_control); 1202 1203 pwr_ctrl3 &= ~CS35L41_SYNC_EN_MASK; 1204 pwr_ctrl1 = enable << CS35L41_GLOBAL_EN_SHIFT; 1205 1206 gpio1_func = enable ? CS35L41_GPIO1_MDSYNC : CS35L41_GPIO1_HIZ; 1207 gpio1_func <<= CS35L41_GPIO1_CTRL_SHIFT; 1208 1209 pad_control &= ~CS35L41_GPIO1_CTRL_MASK; 1210 pad_control |= gpio1_func & CS35L41_GPIO1_CTRL_MASK; 1211
1212 struct reg_sequence cs35l41_mdsync_down_seq[] = {
1213 {CS35L41_PWR_CTRL3, pwr_ctrl3}, 1214 {CS35L41_GPIO_PAD_CONTROL, pad_control}, 1215 {CS35L41_PWR_CTRL1, pwr_ctrl1, 3000}, 1216 }; 1217 ret = regmap_multi_reg_write(cs35l45->regmap, cs35l41_mdsync_down_seq, 1218 ARRAY_SIZE(cs35l41_mdsync_down_seq)); 1219 if (!enable) 1220 break; 1221 1222 if (!pll_lock) 1223 return -EINVAL; 1224 1225 ret = wait_for_completion_timeout(pll_lock, msecs_to_jiffies(1000)); 1226 if (ret == 0) { 1227 ret = -ETIMEDOUT; 1228 } else { 1229 regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3); 1230 pwr_ctrl3 |= CS35L41_SYNC_EN_MASK; 1231 struct reg_sequence cs35l41_mdsync_up_seq[] = { 1232 {CS35L41_PWR_CTRL3, pwr_ctrl3}, 1233 {CS35L41_PWR_CTRL1, 0x00000000, 3000}, 1234 {CS35L41_PWR_CTRL1, 0x00000001, 3000}, 1235 }; 1236 ret = regmap_multi_reg_write(cs35l45->regmap, cs35l41_mdsync_up_seq, 1237 ARRAY_SIZE(cs35l41_mdsync_up_seq)); 1238 } 1239 break; 1240 case CS35L41_INT_BOOST: 1241 ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL1, CS35L41_GLOBAL_EN_MASK, 1242 enable << CS35L41_GLOBAL_EN_SHIFT); 1243 usleep_range(3000, 3100); 1244 break; 1245 case CS35L41_EXT_BOOST: 1246 case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: 1247 if (enable) 1248 ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active, 1249 ARRAY_SIZE(cs35l41_safe_to_active)); 1250 else 1251 ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe, 1252 ARRAY_SIZE(cs35l41_active_to_safe)); 1253 break; 1254 default: 1255 ret = -EINVAL; 1256 break; 1257 } 1258 1259 return ret; 1260 } 1261 EXPORT_SYMBOL_GPL(cs35l41_global_enable); 1262