2 Aug
2007
2 Aug
'07
2:56 p.m.
On Wed, 01 Aug 2007 15:56:48 +0800, Songmao Tian tiansm@lemote.com wrote:
The problem is clear:
- dma_alloc_noncoherent() return a non-cached address, and
virt_to_page() need a cached logical addr (Have I named it right?) 2. mmaped dam buffer should be non-cached.
We have a ugly patch, but we want to solve the problem cleanly, so can anyone show me the way?
virt_to_page() is used in many place in mm so making it robust might affect performance. IMHO virt_to_page() seems too low-level as DMA API.
If something like dma_virt_to_page(dev, cpu_addr) which can take a cpu address returned by dma_xxx APIs was defined, MIPS can implement it appropriately.
And then pgprot_noncached issues still exist...
--- Atsushi Nemoto