28 Sep
2022
28 Sep
'22
10:11 a.m.
Il 27/09/22 17:11, Trevor Wu ha scritto:
Audio tuner is used to handle clock drift between 26M and APLL domain.
It's expected when abs(chg_cnt) equals to upper bound, tuner updates pcw setting automatically, and then abs(chg_cnt) decreases. In the stress test, we found abs(chg_cnt) possibly equals to 2 at the unexpected timing. This results in wrong pcw updating. Finally, abs(chg_cnt) will always be larger than upper bound,
As a result, we update the upper bound to 3 to handle the corner case.
Signed-off-by: Trevor Wu trevor.wu@mediatek.com
Reviewed-by: AngeloGioacchino Del Regno angelogioacchino.delregno@collabora.com