On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald aidanmacdonald.0x0@gmail.com wrote:
Config registers provide a more uniform approach to handling irq type registers. They are essentially an extension of the virtual registers used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3 config_base[1] reg1,0 reg1,1 reg1,2 reg1,3 config_base[2] reg2,0 reg2,1 reg2,2 reg2,3There are 'num_config_bases' base registers, each of which is used to address 'num_config_regs' registers. The addresses are calculated in the same way as for other bases. It is assumed that an irq's type is controlled by one column of registers; that column is identified by the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config register contents. It receives an array of buffers (each represents a row of registers) and the index of the column to update, along with the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock(). Note that the entire register contents are overwritten, which is a minor change in behavior from type registers via 'type_base'.
...
ret = regmap_write(map, reg, d->config_buf[i][j]);if (ret != 0)
if (ret)
dev_err(d->map->dev,"Failed to write config %x: %d\n",reg, ret);}
...
- regmap_irq_set_type_config_simple() - Simple IRQ type configuration callback.
Redundant line.
...
d->config_buf = kcalloc(chip->num_config_bases,sizeof(*d->config_buf), GFP_KERNEL);if (!d->config_buf)goto err_alloc;for (i = 0; i < chip->num_config_regs; i++) {d->config_buf[i] = kcalloc(chip->num_config_regs,sizeof(unsigned int),
Can it be sizeof(**d->config_buf) ?
GFP_KERNEL);if (!d->config_buf[i])goto err_alloc;}