Most dmics produce a high level when they receive clock. The difference between power-on and memory record time is about 10ms, but the dmic needs 50ms to output normal data.
This commit add 100ms delay after SoC output clock so that we can cut off the pop noise at the beginning.
Signed-off-by: Jiaxin Yu jiaxin.yu@mediatek.com --- Hi, This patch is based on for-next and discussed with tzungbi@google.com. --- --- sound/soc/codecs/mt6358.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/sound/soc/codecs/mt6358.c b/sound/soc/codecs/mt6358.c index c17250a..bb737fd 100644 --- a/sound/soc/codecs/mt6358.c +++ b/sound/soc/codecs/mt6358.c @@ -1730,6 +1730,10 @@ static int mt6358_dmic_enable(struct mt6358_priv *priv)
/* UL turn on */ regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003); + + /* Prevent pop noise form dmic hw */ + msleep(100); + return 0; }