On Mon, Jul 15, 2013 at 08:20:28PM +0200, Lars-Peter Clausen wrote:
On 07/15/2013 07:57 PM, Mark Brown wrote:
On Mon, Jul 15, 2013 at 10:27:21PM +0530, Vinod Koul wrote:
Right, we probably want to set an artificial floor here but it still seems like we should be checking that the device actually supports this. If the hardware can only support 64 bytes then the above code won't work properly.
It shouldn't be to hard to extend the dma_caps API with a min_sg_len. But is this something you've actually seen in existing hardware for that the driver would make use of the dmaengine PCM framework? If it is more of theoretical nature we can still easily add it later if it becomes necessary.
I'm not aware of anything but equally well I made zero effort to look and note that quite a few existing drivers appear to have minimum values quite a bit above 16 though I doubt they are all actual restrictions.
That said it is not uncommon that the segment size needs to be a multiple of the burst size. Adding support for that is still on my TODO list but will require some changes to some of the existing users, since implementing this will be a lot easier if all users use the snd_dmaengine_dai_dma_data struct for their DAI DMA data.
Yes, burst sizes are one source of restriction I've seen - probably the main one.