2 Aug
2020
2 Aug
'20
9:43 a.m.
On Sun, Aug 02, 2020 at 10:22:35AM +0800, Shengjiu Wang wrote:
/* Specific configuration for PLL */
if (codec_priv->pll_id && codec_priv->fll_id) {
if (priv->sample_format == SNDRV_PCM_FORMAT_S24_LE)
pll_out = priv->sample_rate * 384;
else
pll_out = priv->sample_rate * 256;
ret = snd_soc_dai_set_pll(asoc_rtd_to_codec(rtd, 0),
codec_priv->pll_id,
codec_priv->mclk_id,
codec_priv->mclk_freq, pll_out);
if (ret) {
dev_err(dev, "failed to start FLL: %d\n", ret);
goto out;
}
ret = snd_soc_dai_set_sysclk(asoc_rtd_to_codec(rtd, 0),
codec_priv->fll_id,
pll_out, SND_SOC_CLOCK_IN);
Just came into my mind: do we need some protection here to prevent PLL/SYSCLK reconfiguration if TX/RX end up with different values?
Sorry, not really catching your point. could you please elaborate? Why do TX/RX end up with different values?
If TX and RX run concurrently but in different sample rates or sample formats, pll_out would be overwritten to PLL/SYSCLK?
I remember imx-wm8962 uses SSI, having symmetric flags for rates/ channels/samplebits, but fsl-asoc-card might have (or will have) other use case.
If all existing combinations don't have any problem, we can add a protection later when we need.