The clock control block shares registers with other Soc components
Signed-off-by: Piotr Wojtaszczyk piotr.wojtaszczyk@timesys.com --- Changes for v5: - This patch is new in v5 - Split previous patch for lpc32xx.dtsi in to 3 patches
arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index 974410918f35..8bf88d141e5b 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -312,18 +312,17 @@ fab { compatible = "simple-bus"; ranges = <0x20000000 0x20000000 0x30000000>;
- /* System Control Block */ - scb { - compatible = "simple-bus"; - ranges = <0x0 0x40004000 0x00001000>; + syscon@40004000 { + compatible = "nxp,lpc3220-creg", "syscon", "simple-mfd"; + reg = <0x40004000 0x114>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0x40004000 0x114>;
clk: clock-controller@0 { compatible = "nxp,lpc3220-clk"; reg = <0x00 0x114>; #clock-cells = <1>; - clocks = <&xtal_32k>, <&xtal>; clock-names = "xtal_32k", "xtal"; };