4 Dec
2018
4 Dec
'18
2:54 a.m.
HI Jiada
There are AVB Counter Clocks in ADG, each clock has 12bits integral and 8 bits fractional dividers which operates with S0D1ϕ clock.
This patch registers 8 AVB Counter Clocks when clock-cells of rcar_sound node is 2,
Signed-off-by: Jiada Wang jiada_wang@mentor.com
sound/soc/sh/rcar/adg.c | 306 +++++++++++++++++++++++++++++++++++++-- sound/soc/sh/rcar/gen.c | 9 ++ sound/soc/sh/rcar/rsnd.h | 9 ++ 3 files changed, 315 insertions(+), 9 deletions(-)
Please update DT binding txt, too
Best regards --- Kuninori Morimoto