On Wed, 2012-02-08 at 15:07 +0530, Vinod Koul wrote:
On Wed, 2012-02-08 at 09:18 +0000, Liam Girdwood wrote:
The set_pll() function is meant to take the input and output frequencies passed in as parameters and then use these to configure the PLL. If the output frequency is 0 then you should switch OFF your PLL to conserve power.
Your function is just enabling the PLLs. Where do you configure the PLL dividers (to divide the input frequency into the output frequency)? Where do you switch the PLL off when it's not in use ?
A different question...
how does a codec driver ensure that input clock is ON. Codec doesn't know anything about platform so shouldn't there be a callback to machine/platform to turn on the input clock?
Atm, the machine driver would have to enable any system clocks before the codec driver could use them.
However, I think one of the intentions of the clk framework rework is to allow non CPU clocks like CODEC PLLs to register as clocks and have their dependencies worked out. I've no idea of the status of this atm, but maybe Mark knows or you could ask on lkml.
Liam