On Wednesday, February 02, 2011 10:33 AM, Alexander Sverdlin wrote:
It's a chip select. The way I've managed it in CODEC it's because Cirrus boards do not have any other SPI devices. Supported by current mainline, at least.
All the EDB93xx boards also have an spi flash device. And there are a couple drivers in mainline that can be used. Depending on the actual spi flash device: drivers/mtd/m25p80.c, drivers/mtd/sst25l.c, or /drivers/misc/eeprom/at25.c.
There are a couple patches floating around to add the spi flash support to the edb93xx platform init but nothing is merged yet.
BTW, you really should remove the or-gate's that Cirrus used with the spi chip-selects to logically-and the SFRM and GPIO signals. The SFRM signal deasserts when the spi fifo's empty which could cause a chip-select deassertion to the chip in the middle of a transfer. For the spi flash, this breaks any read's from the device. Just connect the gpio line directly to the chip-select of the device.
Regards, Hartley