On Thu, Jul 27, 2023 at 05:03:14PM +0200, Olivier Moysan wrote:
Add scaling support to STM32 DFSDM.
This introduces the following changes:
Why?
- Add ADC generic channel binding and remove support of deprecated
channel bindings.
When was it deprecated?
- DFSDM is now implemented as a channel provider, so remove io-channels
properties.
- Add iio-backend property to connect DFSDM to an SD modulator.
io-backends
All sorts of ABI issues with this change. Please explain why you don't care.
Signed-off-by: Olivier Moysan olivier.moysan@foss.st.com
.../bindings/iio/adc/st,stm32-dfsdm-adc.yaml | 189 ++++++------------ 1 file changed, 63 insertions(+), 126 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml index 1970503389aa..128545cedc7f 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -85,22 +85,14 @@ patternProperties: description: Specifies the DFSDM filter instance used. maxItems: 1
interrupts:maxItems: 1
'#address-cells':const: 1
st,adc-channels:description: |List of single-ended channels muxed for this ADC.On stm32h7 and stm32mp1:- For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.- For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.$ref: /schemas/types.yaml#/definitions/uint32-arrayitems:minimum: 0maximum: 7
'#size-cells':const: 0
st,adc-channel-names:description: List of single-ended channel names.
interrupts:maxItems: 1 st,filter-order: description: |@@ -111,39 +103,6 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 5
"#io-channel-cells":const: 1st,adc-channel-types:description: |Single-ended channel input type.- "SPI_R": SPI with data on rising edge (default)- "SPI_F": SPI with data on falling edge- "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1- "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0items:enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]$ref: /schemas/types.yaml#/definitions/non-unique-string-arrayst,adc-channel-clk-src:description: |Conversion clock source.- "CLKIN": external SPI clock (CLKIN x)- "CLKOUT": internal SPI clock (CLKOUT) (default)- "CLKOUT_F": internal SPI clock divided by 2 (falling edge).- "CLKOUT_R": internal SPI clock divided by 2 (rising edge).items:enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]$ref: /schemas/types.yaml#/definitions/non-unique-string-arrayst,adc-alt-channel:description:Must be defined if two sigma delta modulators areconnected on same SPI input.If not set, channel n is connected to SPI input n.If set, channel n is connected to SPI input n + 1.type: booleanst,filter0-sync: description: Set to 1 to synchronize with DFSDM filter instance 0.@@ -157,14 +116,68 @@ patternProperties: items: - const: rx
- patternProperties:
"^channel@([0-9]|1[0-9])$":type: object$ref: "adc.yaml"description: Represents the external channels which are connected to the DFSDM.properties:reg:items:minimum: 0maximum: 19label:description: |Unique name to identify channel.st,adc-channel-types:description: |Single-ended channel input type.- "SPI_R": SPI with data on rising edge (default)- "SPI_F": SPI with data on falling edge- "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1- "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0items:enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]$ref: /schemas/types.yaml#/definitions/non-unique-string-arrayst,adc-channel-clk-src:description: |Conversion clock source.- "CLKIN": external SPI clock (CLKIN x)- "CLKOUT": internal SPI clock (CLKOUT) (default)- "CLKOUT_F": internal SPI clock divided by 2 (falling edge).- "CLKOUT_R": internal SPI clock divided by 2 (rising edge).items:enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]$ref: /schemas/types.yaml#/definitions/non-unique-string-arrayst,adc-alt-channel:description:Must be defined if two sigma delta modulators areconnected on same SPI input.If not set, channel n is connected to SPI input n.If set, channel n is connected to SPI input n + 1.type: booleanio-backends:description: |phandle to an external sigma delta modulator or internal ADC output.$ref: /schemas/types.yaml#/definitions/phandlerequired:- reg- io-backendsadditionalProperties: false- required: - compatible - reg - interrupts
- st,adc-channels- st,adc-channel-names - st,filter-order- "#io-channel-cells"allOf: - if:
@@ -175,14 +188,6 @@ patternProperties:
then: properties:
st,adc-channels:minItems: 1maxItems: 8st,adc-channel-names:minItems: 1maxItems: 8st,adc-channel-types: minItems: 1 maxItems: 8@@ -191,14 +196,6 @@ patternProperties: minItems: 1 maxItems: 8
io-channels:description:From common IIO binding. Used to pipe external sigma deltamodulator or internal ADC output to DFSDM channel.required:- io-channels- if: properties: compatible:@@ -207,12 +204,6 @@ patternProperties:
then: properties:
st,adc-channels:maxItems: 1st,adc-channel-names:maxItems: 1st,adc-channel-types: maxItems: 1@@ -237,15 +228,9 @@ patternProperties: "#sound-dai-cells": const: 0
io-channels:description:From common IIO binding. Used to pipe external sigma deltamodulator or internal ADC output to DFSDM channel.required: - compatible - "#sound-dai-cells"- io-channelsallOf:
- if:
@@ -278,52 +263,4 @@ allOf: minimum: 0 maximum: 5
-examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/stm32mp1-clks.h>
- dfsdm: dfsdm@4400d000 {
compatible = "st,stm32mp1-dfsdm";reg = <0x4400d000 0x800>;clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;clock-names = "dfsdm", "audio";#address-cells = <1>;#size-cells = <0>;dfsdm0: filter@0 {compatible = "st,stm32-dfsdm-dmic";reg = <0>;interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;dmas = <&dmamux1 101 0x400 0x01>;dma-names = "rx";#io-channel-cells = <1>;st,adc-channels = <1>;st,adc-channel-names = "dmic0";st,adc-channel-types = "SPI_R";st,adc-channel-clk-src = "CLKOUT";st,filter-order = <5>;asoc_pdm0: dfsdm-dai {compatible = "st,stm32h7-dfsdm-dai";#sound-dai-cells = <0>;io-channels = <&dfsdm0 0>;};};dfsdm_pdm1: filter@1 {compatible = "st,stm32-dfsdm-adc";reg = <1>;interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;dmas = <&dmamux1 102 0x400 0x01>;dma-names = "rx";#io-channel-cells = <1>;st,adc-channels = <2 3>;st,adc-channel-names = "in2", "in3";st,adc-channel-types = "SPI_R", "SPI_R";st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F";io-channels = <&sd_adc2 &sd_adc3>;st,filter-order = <1>;};- };
...
2.25.1