4 Nov
2014
4 Nov
'14
11:23 a.m.
On Tue, Nov 04, 2014 at 03:15:15PM +0530, Lin, Mengdong wrote:
Hi Mark,
I've posted the v3 patch. Would you please have a review?
There are other Intel machine drivers submitted at the same time, hope they can be integrated smoothly to avoid conflict on Kconfig and Makefile.
Mengdong, I am about to send v3 series of my driver changes. Should I add this driver in my series to avoid merge conflict in Kconfig?
--
~Vinod
>
> Thanks
> Mengdong
>
> > -----Original Message-----
> > From: alsa-devel-bounces@alsa-project.org
> > [mailto:alsa-devel-bounces@alsa-project.org] On Behalf Of Lin, Mengdong
> > Sent: Monday, November 03, 2014 8:11 PM
> > To: Mark Brown
> > Cc: Koul, Vinod; alsa-devel@alsa-project.org; Prusty, Subhransu S; Girdwood,
> > Liam R
> > Subject: Re: [alsa-devel] [PATCH v2] ASoC: Intel: Add Cherrytrail & Braswell
> > machine driver cht_bsw_rt5672
> >
> > > -----Original Message-----
> > > From: Mark Brown [mailto:broonie@kernel.org]
> > > Sent: Friday, October 31, 2014 8:54 PM
> >
> > > On Fri, Oct 31, 2014 at 12:48:26PM +0000, Lin, Mengdong wrote:
> > >
> > > > Now we're working with Realtek to enable runtime PM on RT5672 codec
> > > driver.
> > > > With help of ACPI,
> > > > - the codec will be in suspended to D3 when idle , switch to its
> > > > internal clock, and BIOS will turn off the platform clock output
> > > > (MCLK) to
> > > save power.
> > > > - And when the codec resumes to D0, BIOS will turn on the clock at
> > > > first. And hw_params will make the codec use PLL and lock to MCLK again.
> > >
> > > > Thus the machine driver does not need to explicitly turn on/off the
> > > > platform codec by itself.
> > >
> > > If the machine driver has asked for the PLL to be on I'd expect the
> > > CODEC driver to be respecting that...
> >
> > The codec driver rt5670 defines a supply widget to control the power of PLL.
> > So the PLL will be power on when there is active audio streaming and power off
> > when Idle.
> > The machine driver need not explicitly turn on/off the PLL, but only need to
> > select PLL source to MCLK in hw_params and configure the in/out frequency.
> >
> > And we've verified to enable runtime PM on the codec driver and trigger ACPI
> > method to dynamically control the MCLK output from SOC to the codec:
> > - When codec is active (D0), BIOS will turn on MCLK at first
> > - When codec is suspended on idle (D3), codec will switch to its internal clock,
> > and BIOS will turn off MCLK
> >
> > I'll post V3 machine driver based on your comments on v2.
> > After an internal sync, this machine driver will be moved to sound/soc/intel
> > directory, with other existing Intel machines.
> >
> > Thanks
> > Mengdong
> > _______________________________________________
> > Alsa-devel mailing list
> > Alsa-devel@alsa-project.org
> > http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
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