On Thu, Jan 14, 2016 at 6:25 AM, Caleb Crome caleb@crome.org wrote:
On Thu, Jan 14, 2016 at 12:40 AM, arnaud.mouiche@invoxia.com arnaud.mouiche@invoxia.com wrote:
[..]
SUCCESS! So far...
Great :)
I'm preparing a v3 of my patches including the SOR register + rebased on top of v4.4. I will let you propose the water mark / maxburst patch. But it looks obvious to me that triggering the DMA when only 2 words are left in the FIFO can lead to DMA xruns at such data rate.
The downside is an increased number of DMA requests. So I don't know if you should propose a configuration through the device tree, or a static configuration as done in your patch.
Sounds to me like the device tree is the right place for it. I'll submit an RFC.
For some reason... looks like it can't yet quite keep up at 48kHz. it was working reliably for a while, but now I can only get it reliable at 32kHz. It seems it's the TX that's broken at 48k.
I'll dig in to see where the failure is.
-C
Okay, setting maxburst and watermark to 4 instead of 8 seems to solve the problem at 48kHz.
-Caleb