On Wed, Jun 10, 2015 at 03:17:55PM -0700, anish kumar wrote:
On Tue, Jun 2, 2015 at 1:30 PM, Mark Brown broonie@kernel.org wrote:
On Fri, May 29, 2015 at 01:32:05PM -0700, Anish Kumar wrote:
SOC_ENUM("Input Sel", max98926_input_sel),SOC_ENUM("DAI Input Sel", max98926_dai_input_sel),
These look like DAPM controls?
'Input Sel' is basically as below: DAC Input Select Selects the left, right or mix of left + right as the DAC input signal. 00 = Left DAI input (default) 01 = Right DAI input 10 = Left + Right 11 = Left/2 + Right/2 So i think it is best that it is not part of dapm.
'DAI Input Sel' is the input to the power amplifier. 98926 amplifier can take PCM input from I2S or can take analog signal. So we need to set this as control.
Sure, but it looks like a DAPM control.
SOC_ENUM_EXT("PDM CH0 Enable", max98926_global_enum[0],max98926_get_pdm_ch_zero, max98926_put_pdm_ch_zero),SOC_ENUM_EXT("PDM CH1 Enable", max98926_global_enum[0],max98926_get_pdm_ch_one, max98926_put_pdm_ch_one),
We can get vi feedback in two channels. Customer can enable either channel 0 or channel 1. Channel 0 source can be voltage or current. So basically i created kcontrol for that so that we can either enable channel 0, 1 or both.
'PDM CH0 Enable' 1 causes channel 0 to be enabled for current. So i enable all the relevant bit in put callback.
The user needs to be able to tell all this from the controls, it doesn't seem that hard - it sounds like you want to have SIGGEN widgets for the measurements and then route them to the capture DAI normally.
if ((ret < 0) ||((reg != MAX98926_CHIP_VERSION) &&(reg != MAX98926_CHIP_VERSION1))) {dev_err(codec->dev, "Failed to read: %x\n", reg);return -EINVAL;}You should do this check in the I2C level probe. The error message is also wrong if the register does read but isn't what we expected.
Are you *sure* no new revisions of the device will be made?
yes will remove the revision check as we have few revisions planned.
The driver should probably print the revision for diagnostics.
/* It's not the default but we need to set DAI_DLY */regmap_write(max98926->regmap,MAX98926_FORMAT, MAX98926_DAI_DLY_MASK);
Sounds like this might be the I2S vs left justified configuration?
basically it is dai data delay. Setting this way causes the MSB to be valid on second active edge after LRCLK event.
This should be part of setting the DAI format then.