19 Jan
2008
19 Jan
'08
12:49 p.m.
On Fri, Jan 18, 2008 at 08:50:42PM +0100, Robert Jarzmik wrote:
As we said, I'll implement a machine dependent solution, assuming there'll be in the future a mecanism in ASoC v2 allowing hook inscription for the reset phase. I'll synchronize the cache in this specific function, and will wait ASoC to catch up or propose a patch.
For the benefit of the archives: the root issue here is that AC97 reset has problems working as documented with the SoC CPU being used here so it is normally done using a GPIO line on the CPU. Robert is working on a consumer device for which he doesn't have hardware documentation so is unable to generate a working reset to the chip.