From: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com
The duration of the hw_reset is defined as 4096 cycles. The Cadence IP allows for an additional delay which doesn't seem necessary in practice: the actual reset sequence duration is defined by the sync_go mechanism, not by the IP itself.
Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Reviewed-by: Rander Wang rander.wang@intel.com Signed-off-by: Bard Liao yung-chuan.liao@linux.intel.com --- drivers/soundwire/cadence_master.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 0b7f037e6cd0..4fcc3ba93004 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -1032,10 +1032,7 @@ EXPORT_SYMBOL(sdw_cdns_check_self_clearing_bits); */ int sdw_cdns_exit_reset(struct sdw_cdns *cdns) { - /* program maximum length reset to be safe */ - cdns_updatel(cdns, CDNS_MCP_CONTROL, - CDNS_MCP_CONTROL_RST_DELAY, - CDNS_MCP_CONTROL_RST_DELAY); + /* keep reset delay unchanged to 4096 cycles */
/* use hardware generated reset */ cdns_updatel(cdns, CDNS_MCP_CONTROL,