On Thu, Mar 22, 2012 at 04:46:56PM +0100, Kristoffer KARLSSON wrote:
On 2012-03-21 13:40, Mark Brown wrote:
This makes no sense - how do the vales "span four 8-bit registers" while using only two register addresses?
Every write to register 0x5A copies the written data to the correct active internal chunk of bits of the composite (which after chip boot up is the upper bit parts of the complete 32-bit parameter) then it automatically (as part of the write operation) toggles an internal shift pointer inside the chip that
This *really* isn't what the control you provided describes and is going to break when people try to do things like readback. The hardware design here is sufficiently "creative" that I think the best thing is to just code it in the driver, ideally doing something more direct which makes it clear that you've got this shifting going on.