11 Aug
2020
11 Aug
'20
2:17 p.m.
On 8/11/2020 12:00 PM, Cezary Rojewski wrote:
Implement dsp lifecycle functions such as core RESET and STALL, SRAM power control and LP clock selection. This also adds functions for handling transport over DW DMA controller.
Signed-off-by: Cezary Rojewski cezary.rojewski@intel.com
...
+int lpt_dsp_power_down(struct catpt_dev *cdev) +{
- catpt_dsp_reset(cdev, true);
- /* set 24Mhz clock for both SSPs */
- catpt_updatel_shim(cdev, CS, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1),
CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1));
- catpt_dsp_select_lpclock(cdev, true, false);
- /* DRAM power gating all */
- catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask,
cdev->spec->dram_mask);
- catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask,
cdev->spec->iram_mask);
- /* set D3 */
- catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, CATPT_PMCS_PS_D3HOT);
- udelay(50);
- return 0;
+}
+int lpt_dsp_power_up(struct catpt_dev *cdev) +{
- /* SRAM power gating none */
- catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, 0);
- catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->dram_mask, 0);
Wrong mask for iram here? For example in above function (lpt_dsp_power_down) cdev->spec->iram_mask is used?
- /* set D0 */
- catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, 0);
- udelay(100);
- catpt_dsp_select_lpclock(cdev, false, false);
- catpt_updatel_shim(cdev, CS,
CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1),
CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1));
- udelay(50);
- catpt_dsp_reset(cdev, false);
- /* generate int deassert msg to fix inversed int logic */
- catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB | CATPT_IMC_IPCCD, 0);
- return 0;
+}