The analogue circuits in WM8962 require a mid-rail analogue reference voltage, VMID, which generator is enabled by STARTUP_BIAS_ENA bit, while VMID_BUF_ENA bit can enable buffered VMID to avoid audible pops.
Besides, these circuits also need a bias current enabled by BIAS_ENA.
Then set VMID_SEL to 2x5k divider, the fast start-up mode, to power it up. And let set_bias_level() handle its 2x250k for low power standby and 2x50k for normal operation.
This patch might be kinda reverting operation against commit 52c0eee3 but after testing with WM8962 CODEC, these configurations during power up should be essential and soc-core would not do any of them. So the codec drvier need to handle it.
Signed-off-by: Nicolin Chen b42378@freescale.com --- sound/soc/codecs/wm8962.c | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 7a7a056..c63b58e 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -3773,6 +3773,17 @@ static int wm8962_runtime_resume(struct device *dev)
regcache_sync(wm8962->regmap);
+ regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP, + WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA, + WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA); + + /* Bias enable at 2*5k (fast start-up) */ + regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1, + WM8962_BIAS_ENA | WM8962_VMID_SEL_MASK, + WM8962_BIAS_ENA | 0x180); + + msleep(5); + return 0; }