Use fls to calculate the pre-divider and input frequency for the PLL, this is marginally faster than the previous loop.
Suggested-by: Andy Shevchenko andy.shevchenko@gmail.com Signed-off-by: Charles Keepax ckeepax@opensource.cirrus.com ---
Changes since v1: - Change / into >>
Thanks, Charles
sound/soc/codecs/cs42l43.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/cs42l43.c b/sound/soc/codecs/cs42l43.c index 23e9557494afa..2c402086924d3 100644 --- a/sound/soc/codecs/cs42l43.c +++ b/sound/soc/codecs/cs42l43.c @@ -1338,10 +1338,9 @@ static int cs42l43_enable_pll(struct cs42l43_codec *priv)
dev_dbg(priv->dev, "Enabling PLL at %uHz\n", freq);
- while (freq > cs42l43_pll_configs[ARRAY_SIZE(cs42l43_pll_configs) - 1].freq) { - div++; - freq /= 2; - } + div = fls(freq) - + fls(cs42l43_pll_configs[ARRAY_SIZE(cs42l43_pll_configs) - 1].freq); + freq >>= div;
if (div <= CS42L43_PLL_REFCLK_DIV_MASK) { int i;