On 24/10/2019 20:18, Mark Brown wrote:
On Thu, Oct 24, 2019 at 05:12:21PM +0100, Jon Hunter wrote:
On 18/10/2019 16:48, Ben Dooks wrote:
@@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, TEGRA30_I2S_CTRL_LRCK_MASK; switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_A:
ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;Sorry, I just saw the feedback on the previous iteration. I don't think we want to set the polarity but based upon the format that is passed ...
The polarity should be set based on the the inversion flags in the format, normally both DSP modes trigger on the rising edge of the LRCLK. The difference is if there's a delay before the first data bit or not.
Yes. Sorry I realise my email was not clear and when I meant format, I was referring to the bits in the format mask part of the format. In the example, I shared we use the inversion bits for the determining the polarity. There was an old version of one of our drivers where we had done this incorrectly.
Cheers Jon