15 Jun
2017
15 Jun
'17
12:22 p.m.
On Thu, Jun 15, 2017 at 12:39:40AM +0000, Kuninori Morimoto wrote:
ak4613 CTRL2::CKS controls Speed Mode (Normal/Double/Quad) for Master Mode. In default, Normal Mode uses 512fs, but in such case, requested input clock for all mode will be same. Then, it might not be eble to support correct output if input clock was not enough. This patch uses 256fs, and reduse requested imput clock for Noral Mode.
snd_soc_update_bits(codec, CTRL1, FMT_MASK, fmt_ctrl);
- snd_soc_update_bits(codec, CTRL2, DFS_MASK, ctrl2);
- /* CKS = 00 */
- snd_soc_update_bits(codec, CTRL2, (CKS_MASK | DFS_MASK), ctrl2);
This looks board specific - shouldn't we be setting the speed mode based on a combination of the sampling rate and the master clock for the device?