On Wed, May 24, 2023 at 12:57:02PM +0100, Mark Brown wrote:
On Tue, May 23, 2023 at 04:38:20PM -0500, Chris Morgan wrote:
+static unsigned int ratios_12000[] = {
- 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
- 48000, 88235, 96000,
+};
+static struct snd_pcm_hw_constraint_list constraints_12000 = {
- .count = ARRAY_SIZE(ratios_12000),
- .list = ratios_12000,
+};
...
- case 12000000:
es8328->sysclk_constraints = &constraints_12000;es8328->mclk_ratios = ratios_12000;The other constraints have separate rates and ratios, with wildly different values between the two - the ratio (I'm guessing a clock divider) being written to a 5 bit field which obviously can't contain the actual sample rate.
A bit over my head here, I saw this patch from the Rockchip BSP kernel branch and tested it on my mainline kernel. Long story short the clock for the mclk is 12000000. I see that there are similar issues for the ES8316 on the Rock 5B, so I will probably just wait for a proper fix there and then implement something similar here.
Thank you.