On Tue, Apr 27, 2010 at 04:03:27PM -0500, Timur Tabi wrote:
[Reflowing the text into 80 columns again]
Mark Brown wrote:
It's entirely possible that if the board designer intended the verious SSIs to be used in concert they've done something like cross wire the clocks which creates a board-specific interrelationship that needs to be dealt with.
Fine, but I don't see how that can be handled with the current code. Each SSI is independent, and audio is streamed to it via DMA. The current SSI driver would need to be completely rewritten in order to initiate both DMA operations simultaneously. The clocking is the least of my problems.
I believe the usual technique is to start the DMA then clock the bus - data doesn't flow over the bus until the clock appears and that appears everywhere simultaneously. Obviously some hardware really doesn't like having the DMA blocked like that, but not all.